Li
Chen
I graduated from Department of Electrical and Computer Engineering, University of California, San Diego in June 2003. I am now working at Intel Oregon. For new contact info, please email my UCSD account.
Thesis Advisor: Prof. Sujit Dey
Email: l i c h e n @ e c e . u c s d . e d u
Education:
Publications:
- L. Chen, S. Ravi, A. Raghunathan, and S. Dey, "A scalable software-based self-test methodology for programmable processors," Proc. 40th Design Automation Conf., Anaheim, CA, June 2003, pp. 548-553. (Best Paper Award Candidate) (pdf)
- Y. Zhao, L. Chen, and S. Dey, "On-line Testing for Multi-source Noise-induced Errors in System-on-Chip Interconnects and Buses," IEEE Proceedings of International Testing Conference, Baltimore, MD, October 2002, pp. 491-499. (pdf)
- A. Krstic, L. Chen, W.-C. Lai, K.-T. Cheng, and S. Dey, "Embedded Software-Based Self-Test for Programmable Core-Based Designs," IEEE Design and Test of Computers, vol.19, (no.4), July 2002, pp. 18-27. (pdf)
- L. Chen, X. Bai, and S. Dey, "Testing for interconnect crosstalk defects using on-chip embedded processor cores," Journal of Electronic Testing: Theory and Applications, vol.18, (no.4), August 2002, pp. 529-538. (pdf)
- L. Chen and S. Dey, "Software-based diagnosis for processors," Proc. 39th Design Automation Conf., New Orleans, LA, June 2002, pp. 259-262. (pdf)
- A. Krstic, W.-C. Lai, L. Chen, K.-T. Cheng, and S. Dey, "Embedded Software-Based Self-Testing for SoC Design," Proc. 39th Design Automation Conf., New Orleans, LA, June 2002, pp. 355-360. (pdf)
- L. Chen, X. Bai, and S. Dey, "Testing for interconnect crosstalk defects using on-chip embedded processor cores," Proc. 38th Design Automation Conference, Las Vegas, NV, June 2001, pp. 317-322. (pdf)
- L. Chen and S. Dey, "Software-based self-testing methodology for processor cores," IEEE Trans. Computer-Aided Design, vol.20, (no.3), March 2001, pp. 369-380. (pdf)
- S. Dey, P. Sanchez, D. Panigrahi, L. Chen, C. Taylor, and K. Sekar, "Using a Soft Core in a SOC Design: Experiences with picoJava," IEEE Design and Test of Computers, July-September 2000, pp. 60 - 71.
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Li Chen, Sujit Dey, Pablo Sanchez, Krishna Sekar, and Ying Chen, "Embedded
Hardware and Software Self-Testing Methodologies for Processor Cores," Proceeding of the 37th Design Automation Conference, Los Angeles, CA, June 2000, pp. 625 - 630. (pdf)
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Li Chen and Sujit Dey, "DEFUSE: A Deterministic Functional Self-Test Methodology for Processors," Proceedings of the 18th IEEE VLSI Test Symposium 2000, Montreal, Canada, April 2000, pp. 255 - 262. (pdf)
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Li Chen and Sujit Dey, "A Deterministic Functional Self-Test Methodology
for Processors," IEEE International High Level Design Validation and Test
Workshop 1999, San Diego, CA, Nov. 1999, pp. 17 - 22. (pdf)
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L. Chen, L. Milor, C. Ouyang, W. Maly, and Y. Peng, "Analysis of the Impact
of Proximity Correction Algorithms on Circuit Performance," IEEE Transactions
on Semiconductor Manufacturing, vol.12, (no.3), pp. 313-22, August,
1999. (pdf)
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L. Chen, L. Milor, C. Ouyang,
W.
Maly, and Y.Peng, "Analysis of the Impact of Proximity Correction Algorithms
on Circuit Performance,"
The 7th International Symposium on Semiconductor
Manufacturing, pp. 257-260, October, 1998 (postscript)
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L. Chen, L. Milor, C. Ouyang, W. Maly, and Y. Peng, "Proximity Effect Correction
for Clock Rate Maximization," Proc. SPIE, Vol . 3510, pp. 82-93,
September, 1998 (postscript)
UCSD Research:
ESDAT: Embedded System Design Automation and
Test Group
Research project: Self-testing
of embedded processors and system-on-chips
My resume (updated on February 25, 2003). I have graduated in June 2003.
This page is maintained by Li Chen (l i c h e n @ e c e . u c s d . e d u)